HBLANK (MZ-80A)

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mz-80a
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HBLANK (MZ-80A)

Post by mz-80a »

Hlide and I were attempting to create a split character by waiting for hblank on the 80A. Code as follows:

Code: Select all

LD A,0C6H
CALL 0DDCH

LD HL,0D3E9H
LD DE,0D3EAH
LD BC,27H
LD (HL),0D0H
LDIR
LD BC,27H
LD (HL),43H
LDIR

LD DE,0E27DH
LD HL,0E008H
VBLANK: LD A,(0E002H)
RLA
JR C,VBLANK
LD A,$7F
HBLK1: CP (HL)
JP C,HBLK1
LD A,(DE)
LD A,$7F
INC DE
INC DE
INC DE
INC DE
INC DE
HBLK2: CP (HL)
JP C,HBLK2
LD A,(DE)
...
...
...
That is an unfinished routine (but really just requires DEC DE x5 perhaps and looping back to waiting for VBLANK).

We couldn't really get this to work though. It'd be good if anyone knows the 80A hardware enough to give us some hints whether it is possible to even split pixel lines alternately (using the video scroll available on the 80A through $E27D etc). Here we wait for HBLNK, we change the scrolled area of the screen, then wait for HBLNK again (after burning some cycles using INC DE five times). And so on.

psmart : perhaps you have an idea of the possibility of achieving this?
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S_U_C
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Re: HBLANK (MZ-80A)

Post by S_U_C »

0E008H D0 is the hblank signal
so why not isolate bit with
LD A,1
AND (HL)
and test the Z flag

or you could
LD A,(HL)
RRCA
and test the C flag
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Re: HBLANK (MZ-80A)

Post by mz-80a »

How many HBLANKs can we detect with that method? I think we need to be CPU cycle specific and must burn enough T-states during the time that the CPU cannot write to the video RAM so that we can come out the other side of the current HBLANK and begin detecting the next one
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S_U_C
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Re: HBLANK (MZ-80A)

Post by S_U_C »

LD A,$7F
HBLK1: CP (HL)
JP C,HBLK1
is 24 T-cycles loop is 17

LD A,1
HBLK1:AND (HL) ; if (HL) = ? ? ? ? ? ? ? 1 A = 1 / if (HL) = ? ? ? ? ? ? ? 0 A = 0
JP NZ, HBLK1
is 24 T-cycles loop is 17

HBLK1:LD A,(HL)
RRCA
JP C,HBLK1
is 21 T-cycles loop is 21

My code will find Hblank on D0
Your code will not find Hblank
127-X only generates a Carry if X > 127
You are testing bit D7
That might explain your problem. " waiting for hblank on the 80A"/"We couldn't really get this to work though."
See page 163 ofthe Owners Manual
I known the diagram 3.10 on page 173 shows blank on D7 but I think that a miss print
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Re: HBLANK (MZ-80A)

Post by mz-80a »

OK, I mis-spoke in that case. When I say "we didn't really get this to work" we definitely *did* get it to work, but only for one scanline on the VDU. We weren't able to test for further HBLANKs after that. I'll take a look at your code later and give it a go!
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hlide
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Re: HBLANK (MZ-80A)

Post by hlide »

@S_U_C

I was vaguely supposing the GAL 82S100N (U40) was setting /WAIT = 0 when BLNK = 1 and /CSD = 0 in a similar fashion as MZ-700 to avoid snow effect when video circuit is reading VRAM. So I thought we could try to access VRAM to sync with the BLNK period and switch the hardware scroll address during that BLNK period. But it seems not work this way. I have no MZ-80 A at my "work" home so I cannot check those pins through an LA so I couldn't go further.
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Re: HBLANK (MZ-80A)

Post by hlide »

Also, I'm surprised : isn't $E008.D0 in input supposed to give use a 32Hz pulse for TEMPO? On MZ-700, D0 is 32Hz pulse and D7 is BLNK pulse.
CSE2.png
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Re: HBLANK (MZ-80A)

Post by hlide »

MZ-80 K:
CSE2.png
MZ-700:
CSE2-700.png
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Re: HBLANK (MZ-80A)

Post by hlide »

And I cannot find the link between /WAIT (connected to Z80) and /EXWAIT (connected to GAL) in the MZ-80 A schematics. /WAIT is just connected to Z80 with no pull in sight and I cannot spot /WAIT somewhere else. I suspect the schematics missing that part.
S_U_C
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Re: HBLANK (MZ-80A)

Post by S_U_C »

I am not saying you can not detect a pulse with your code but it is the tempo signal from a 556 timmer for the sound not the video Hblank
See page 163 of the Owners Manual .
The Hblank signal from the video goes through a re-triggerable mono-stable to generate a fixed length pulse using capacitors and resisters.
The frequency will remain the same but the mark/space ratio will be different on each machine due to component tolerances and component aging.
The screen is 40x25 chracters, dot wise it is 320x 200 and each dot is clocked with a 1, 8MHz clock pulse (0.125us) so a row takes 40us
and there should be 200 Hblanks
So sampling every 17 T-cylces or 8.5us there is no chance of missing a Hblank pulse every 40us unless the mark/space is 5:1
The service manual show a 40us low pulse every 60us
If you are tying to find the "high" 20us a 17T-cylce( 8,5us) loop is OK
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