Sharp MZ

So I checked one demo (Sharper 2022) and it fails to draw graphics in several parts. Are you aware of them?

Also, is there a way to load a MZF file other than from the list?

hlide wrote: ↑Sun Nov 19, 2023 2:18 pm So I checked one demo (Sharper 2022) and it fails to draw graphics in several parts. Are you aware of them?

Did you turn on the "CRT Emulation" ?
This demo has been a challenge, I'm aware that some parts does not emulate perfect, still working on it, however any suggestion what might be wrong is welcome

hlide wrote: ↑Sun Nov 19, 2023 2:19 pm Also, is there a way to load a MZF file other than from the list?

For the moment, not without modifying the code. I'm aware about this short-come ...
I'll implement a way to load a MZF file from the file-system soon

CnfBenMorgan wrote: ↑Mon Nov 20, 2023 9:58 am Did you turn on the "CRT Emulation" ?

I disabled it, but there are still some glitches.

I will give you two MZF which should help you in this regard when I find them back.

Once is displaying moon sailor in a 112x200 graphics window (only working for PAL)
The second allows to check up to many cycles you can do graphics characters.


Good PAL version: Bad NTSC version: Good display under 83 cycles (it shouldn't be over 82 but my MZ-700 had a CMOS Z80@20MHz which seems to tolerate 83 cycles whereas the genuine Z80 won't): Bad display over 83 cycles with my tolerant CMOS Z80@20MHz:

I put those MZF files in an archive:

hlide wrote: ↑Mon Nov 20, 2023 8:42 pm I put those MZF files in an archive:
test.zip

Thank you, that helps, and I clearly see that emulation is far from working. None of those tests are working.
One thing that I'm sure about, is the relation with VBLNK BLNK and HBLNK, Unfortunately I don't a real MZ-731 (I know I should find and buy one ...) I would love to poke around with an oscilloscope.

EmuZ-700 uses /BUSREQ trick to pause Z80 while the BLNK is 0 (it uses CPU cycles to count any kinda of cycles - timers for every chips).

But the real emulation is to observe /WAIT = 0, that is, /WAIT = BLNK. Where BLNK is set 1 at the beginning of a line during 82 cycles (PAL, 62 cycles for NTSC), then cleared to 0 until the next line.

I believe mz800emu is more accurate.

Is always WAIT == BLNK on any RD/WR ? My understanding is that only when accessing the VRAM a WAIT can be triggered ? - This is how I have implemented it.
I may be wrong about this, that would cause a very slow RAM access, .... but well, I may have got it all wrong

Indeed, /WAIT = 0 due to BLNK = 0 is applied only when the CPU address is in range $D000-$DFFF (and no DRAM mapped).